Higher integration of semiconductor devices is required to satisfy consumer demands for superior performance and inexpensive prices. In the case of memory semiconductor devices, since their integration is an important factor in determining product price, increased integration is especially required. In the case of typical two-dimensional or planar memory semiconductor devices, since their integration is mainly determined by the area occupied by a unit memory cell, integration is greatly influenced by the level of fine pattern forming technology. However, since extremely expensive semiconductor equipments are needed for increasing pattern fineness, integration of two-dimensional memory devices is increasing but is still limited.
As an alternative to overcome such a limitation, there have been proposed three-dimensional semiconductor memory devices. However, for mass production of three-dimensional semiconductor memory devices, process technology that can decrease fabricating cost per bit compared with two-dimensional semiconductor memory devices and realize reliable product characteristics is required.